|Job Id|| E1975766|
|Job Title||Digital Design Engineer-WiFi PHY (Staff Level)|
|Company||Qualcomm Technologies, Inc.|
|Job Area||Engineering - Systems |
|Location||California - San Jose |
|Job Overview||Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Responsibilities include the following:|
- Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such as OFDM and OFDMA modulators and demodulators, transmit beamforming, timing and synchronization, RF impairment correction, adaptive filters.
- Working with the algorithms/systems/modeling team to obtain a fixed-point/finite-precision C/C++ model that is realizable in optimized ASIC hardware.
- Converting the finite-precision models into ASIC hardware using Verilog and SystemVerilog as the primary hardware description language that meet the area and power targets.
- Working with the verification engineers to develop unit-level and integrated-level test-benches.
- Debugging the designs in stand-alone and integrated with the system.
- Synthesis and gate-level timing tasks related to the designed module and assist with verification and timing of the entire chip.
- Design quality check such as lint, CDC and low power rule checks.
- RTL-level and gate-level vector-based power analysis.
|All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.|
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.
- 5+ years Systems Engineering or related work experience.
|Preferred Qualifications||A combined experience of at least 5 to 10 years with the following preferred:|
- Digital Signal Processing for high-bandwidth real-time image or signal processing applications.
- Fixed and floating point design and implementations.
- Verilog / SystemVerilog based ASIC design targeted toward high-speed DSP/Datapath applications.
- Experience with power analysis and optimization techniques.
- RTL verification.
- Matlab, C++.
- Experience with High Level Synthesis (HLS).
- Asynchronous design styles.
- FPGA synthesis and emulation.
|Education Requirements||Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.|
|Keywords||WiFi, WLAN, PHY, OFDM, DSP, Beamforming, Timing, Verilog, SystemVerilog, ASIC, Spyglass, DC, Timing, PowerArtist, Powertheater, Synthesis, Matlab, C++|