Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.
The Architecture Co-Verification team is an exciting, fast paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SOC) devices using industry leading HW emulators (such as Cadence Palladium) and FPGA based prototyping platforms (such as Cadence Protium). The team is deployed in all aspects of SoC development phases including architectural exploration, HW/FW co-development, pre-silicon functional co-verification, pre/post silicon performance testing, power analysis, and critical post-silicon investigations. As a Verification Engineering Intern, you will be working closely with hardware designers, firmware engineers, and verification teams throughout the SoC development process. This is a role for a versatile Intern that enjoys the challenges of HW/FW co-development and system level co-verification using leading edge HW emulators and FPGA platforms. It’s a high visibility role that will develop a wide range of skills and exceptional problem-solving ability. Responsibilities could include, but are not limited to, the following:
- Porting SoC RTL to industry leading HW emulators and FPGA platforms.
- Developing emulation specific HW for pre-silicon subsystem/system level co-verification.
- Developing common test ecosystem across pre/post silicon.
- Developing FW/tests for pre-silicon subsystem/system level co-verification.
- Troubleshoot and resolve complex problems in embedded real-time systems executing co-verification test plans.
- Effectively present technical information to small teams of engineers.
This is an intern position from January 2020 to April 2020.
- Enrolled in current EE/CS/CE BS or Masters degree.
- Excellent analytical, communication and documentation skills.
- Excellent debug and problem-solving skills.
- Willing to learn in a fast-paced environment, being a self-starter, and organized.
- LINUX experience and good programming / scripting skills with languages such as Python, Tcl, C and Perl.
- Familiarity in C/C++ FW development.
- Familiarity in system level co-verification techniques.
- Familiarity with hardware design and implementation.
- RTL experience with VHDL, Verilog, and System Verilog.
- Knowledge of protocols such as SAS/SATA and PCIE /NVME.
- Knowledge of MIPS and/or ARM CPU architecture and firmware programming.
- Knowledge of source control systems such as subversion or perforce.
Equal Opportunity EmployerMicrochip is an Equal Opportunity/Affirmative Action Employer of Disabled / Veterans / Minorities / Women. We provide equal employment and affirmative action opportunities to applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability, or any other basis protected under applicable federal, state or local laws.
For more information on applicable equal employment regulations, please refer to the EEO is the Law Poster and the EEO is the Law Poster Supplement. Please also refer to the Pay Transparency Policy Statement.