MaxLinear is seeking a Principal Place and Route (PnR) Engineer to join our team in either our Irvine, CA design center or our Carlsbad, CA corporate headquarters and design center. In this role, you’ll focus on the following:
- Responsible for timing closure, physical verification and power integrity signoff for block level and chip
- Analytical & problem-solving skills to debug clock tree and timing
- Ability to debug and solve DRC and LVS problems
- Ability to analyze and solve static and dynamic voltage drop, electro migration for chip.
- Place and route flow, timing and SI closure, synthesis, timing analysis, power and IR drop analysis, formal verification, MMMC, flat and hierarchical flow, ECO, physical design methodology, prototyping etc.
- Must be a team player with an eye on innovation and automation to reduce turnaround time for chips
- Solid communication skills to interact with ASIC and analog design teams
- Knowledge and experience with floorplan, placement, Clock tree synthesis and routing is a must
- Should be familiar with parasitic extraction, signal integrity and static timing analysis
- Place and route tool: Innovus/ICC2 experience for floorplan, place, clock tree [CTS], routing, SI and timing closure
- Static Timing Analysis tools such as Tempus/Primetime
- Static and dynamic IR tools such as Redhawk/Voltus
- Physical verification tools such as Calibre for DRC & LVS
- Knowledge of scripting using Tcl, Perl and unix shell script
- Bachelor's Degree in Electrical Engineering, Computer Science or related + 8 years of experience, MS + 6 years of experience, or Ph.D. + 3 years of experience
MaxLinear is a global, New York Stock Exchange-traded company (NYSE: MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, designing highly integrated, radio-frequency, and mixed-signal Communications ICs for broadband and infrastructure applications.
We hire the best people in the world and engage them in some of the most exciting opportunities in our broadband and infrastructure markets. Our growth has come from innovative, bold approaches to solving some of the world’s most challenging communication technology problems.
MaxLinear began by developing the World’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products for satellite communications, cable modems, and terrestrial TV; diversified into high speed products addressing Datacom applications such as 400 Gbps fiber-optic interconnect chips for high-speed networks; and MoCA technology for home networking.
Our headquarters is in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, CA; in Vancouver, Canada; in Valencia, Spain; and in Bangalore, India.
We have approximately 800 employees, a substantial majority of whom have engineering degrees, and include masters and Ph.D. graduates from many of the premiere universities around the world. Our engineers thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building great products.