- Bachelor's degree in Electrical Engineering or a related discipline and a minimum of 9 years of relevant experience (7+ years with an MS)
- Experience in full product life cycle of ASIC Design
- Experience in backend ASIC design including synthesis and static timing analysis, place and route, physical verification (LVS/DRC)
- Experience with Cadence ASIC toolset e.g., Innovus, Genus, Tempus etc.
- Proficiency in HDL (VHDL/Verilog)
- Proficiency in scripting languages such as Tcl, Python or Perl
- Knowledge of DFT, scan insertion and ATPG is a plus
- U.S. citizenship with the ability to obtain and maintain a Secret security clearance
- Effective communication and presentation skills and high proficiency in technical problem solving
- Master's Degree in Electrical or Computer Engineering
- Experience with advanced technology nodes (sub 22nm)
- Experience with Global foundries, TSMC or Honeywell Foundries
- Active DoD Secret Clearance or higher
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.